en:hardware:perifericos:mark_2_interface []

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  <div class="pcw-title-ultra retro-text-green"> A> MARK 2 INTERFACE </div>
  
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    <p>The Mark 2 from </html>[[en:companias:SCA Systems]]<html> is a peripheral that provides the </html>[[en:PCW]]<html> ecosystem with an RS232C serial port, a Centronics parallel port and also features a real-time clock (RTC).</p>
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  <div class="pcw-subtitle-box">Hardware Images</div>
  
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        <div class="img-frame"><a href="#m2b"><img src="/lib/exe/fetch.php?media=hardware:perifericos:Mark-2-Bottom.jpg"></a><span class="img-label">Bottom Case</span></div>
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  <div class="pcw-subtitle-box">Description, Context and Preservation History</div>
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    <p>Designed and manufactured in the late 1980s by the specialized hardware firm <strong>SCA Systems</strong>, the <strong>Mark 2</strong> (Mk II) expansion stands out as one of the most advanced and complete professional-grade multi-function peripherals engineered for the Amstrad PCW 8256 and 8512 computers. Conceived as an integrated alternative to surpass Amstrad's official CPS8256 interface, SCA Systems' purpose with the Mark 2 was to centralize all vital office communication links into a single, compact add-on module. This design elegantly prevented motherboard expansion bus saturation caused by chaining multiple discrete single-purpose expansion cards.</p>
    <p>At the low-level hardware tier, the ultimate competitive advantage of the Mark 2 over its direct contemporary rivals was the inclusion of an onboard **Real-Time Clock (RTC)** circuit. In stock Amstrad PCW setups, the CP/M Plus operating system was structurally unable to retain the system time and calendar date after a power cycle, forcing professional operators to manually type them via console command lines upon every single cold boot. The Mark 2 completely automated this process: during the system initialization sequence, a small resident device driver polled the peripheral's timekeeper chip and instantly injected the exact, accurate time matrix straight into the CP/M Plus file allocation ecosystem, ensuring pristine chronological logging for business spreadsheets and documents.</p>
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  <div class="pcw-subtitle-box">Hardware Architecture and I/O Port Mapping (Low-Level)</div>
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    <p>To guarantee flawless 100% compatibility with all mainstream commercial business software without requiring proprietary vendor drivers inside user applications, SCA Systems' engineers decodified the board's integrated circuits to perfectly match the standard hardware address spaces of the machine:</p>
    <ul>
      <li><strong>Serial and Parallel Communication Links:</strong> The hardware board responds natively to the classic Z80 I/O address ports spanning from <code>0E0h</code> to <code>0E3h</code> (UART serial RS-232C control and data registers, and the 8-bit output data latch buffer for the Centronics parallel port). This strict choice ensured that professional word processors (such as <em>LocoScript</em>) or dedicated terminal telecom software operated instantly right out of the box, cleanly identifying the pass-through expansion hardware.</li>
      <li><strong>RTC Circuitry and Battery Backup:</strong> The hardware timekeeper chip (typically an ultra-low power consumption real-time clock integrated circuit, such as those from the OKI or Epson semiconductor families) communicated with the Z80 CPU through registers mapped out inside the system's unallocated I/O address ranges. The top PCB layer houses a dedicated power supervisor circuit paired with a physical non-volatile energy cell (either a lithium coin battery or a NiCd button rechargeable accumulator). This backup cell keeps the RTC's quartz crystal oscillator running and retaining the time track for years, entirely unassisted, even if the Amstrad PCW is completely disconnected from the mains power grid.</li>
      <li><strong>Symmetric Serial Voltage Subsystem:</strong> The integrated RS-232C serial port requires true negative voltage rails to comply with international telecommunication signaling standards. The lower PCB layer of the Mark 2 interface features an integrated custom voltage inverter/converter sub-circuit. This module cleanly synthesizes the necessary <strong>-12V</strong> rail directly out of the incoming positive +5V and +12V power supply lines distributed along the PCW's 50-pin lateral expansion bus, discarding any requirement for cumbersome secondary external transformers.</li>
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