A> TEST PCB AMSTRAD PCW 8256

This diagnostics board from [[en:companias:Amstrad|Amstrad]] is the official one used in technical services. It performs a very complete series of tests on the machine to check its status and diagnose possible breakdowns.

Hardware Images

PCB Top View

Description, Context and Principle of Operation

The official diagnostic board from Amstrad constitutes a highly sought-after workshop engineering tool from the 1980s, distributed exclusively to authorized technical service centers. The existence of this board stems from a critical design choice of the Amstrad PCW motherboard: the machine completely lacks a traditional internal ROM memory that stores basic boot routines or a minimal operating system. Instead, when powering on the equipment, the Z80 CPU is entirely empty and relies on the floppy disk controller chip injecting the first block of code directly into the RAM memory.

When a PCW 8256 suffered a severe silicon breakdown (black screen, rapid reset loop, or visual corruption due to static lines), it was impossible to load a floppy disk or execute an ordinary software diagnostic program. The official Test PCB solved this diagnostic deadlock through an electronic engineering technique known as ROM Shadowing (ROM Shadowing / Bus Overriding). By plugging the board into the 50-pin lateral expansion connector, the hardware assumes immediate control of the machine's communication lines at the exact moment of power-on (boot vector 0000h), completely bypassing the floppy disk drives and allowing the computer to be audited directly and in a purely physical manner.

Hardware Architecture and Logical Testing Routines

The electronic circuit of the test board implements discrete integrated circuits designed to isolate the bus and force the execution of its autonomous firmware:

Injection of the Diagnostic EPROM: The board houses a physical EPROM memory (typically chips from the 27C64 or 27C128 series) containing the low-level verification binary routines written by Amstrad engineers. To force the Zilog Z80 microprocessor to read instructions from this external EPROM and not the motherboard's memory banks, the decoder integrated circuit on the Test PCB intercepts the essential memory read control lines (/MREQ and /RD). The card's logic toggles the lines and prevents the lower RAM from responding to the processor during the initial verification phases, seamlessly supplanting the physical space of the bus.
Bit-by-Bit Sweep of the RAM Memory (March Test): Once control of the system is taken, the diagnostic firmware sequentially executes an intensive loop over the dynamic RAM integrated circuits on the motherboard. It synchronously writes alternating bit patterns (such as the hexadecimal sequence 55h and AAh, corresponding to the rapid alternating binary maps 01010101 and 10101010) into each physical address and, immediately following, performs a return read. If a single bit fails or becomes corrupted during the storage process, the algorithms determine the exact address of the damaged chip, displaying the corresponding error code via visual signals on the board's LEDs or through basic text strings injected onto the monitor.
Forced Initialization of the Video Controller: The injected code skips the operating system calls and writes directly to the native video controller registers of the PCW. By sending stable synchronism signals toward the CRT tube, the technician can visually isolate whether a screen failure is due to a digital logic breakdown or an analog defect of the integrated Amstrad monitor.